The present invention relates to a cell switch comprising a switch core, a plurality of switch ports connected to the switch core for directing therethrough cells received from outside the switch and containing useful data and destination information, and for receiving cells from the core, tagging means in the ports for creating, based upon the destination information of a received cell, a tag belonging to the cell and containing routing information enabling directing the cell through the core to a desired destination port.
The invention furthermore relates to a method for routing cells through a cell switch which comprises a switch core, a plurality of switch ports connected to the switch core for directing therethrough cells received from outside the switch and containing useful data and destination information, and for receiving cells from the core.
In a switch of the kind indicated above cell buffers may be arranged so as to avoid loss of cells which simultanously arrive to the switch and shall pass a resource common to the cells, e.g. an output. In known systems cell buffers need to be located in the switch core for attaining this object. In order to attain a high efficiency a great number of cell buffers in the switch core are therefore required.
By locating cell buffers only in the switch ports the magnitude of the core and thereby its cost could be reduced. This would be advantageous in that a low cost for the switch core reduces the total cost for scaleable systems which have been configured with only a few number of ports. The switch cost would thus be more modular.
One problem is, however, how to avoid conflict in the switch core so that the need of cell buffers in the core may be eliminated.
In EP 268,259 there is described a switch with a multiple stage packet transfer between switch inputs and outputs. A tag identifies packet destination for directing the packet to a suitable output while avoiding transmission conflicts. Buffering is provided for packets which may not immediately be transferred due to conflicts, an upper limit being set for the stay of the packet in the packet transferring network.
The packets are handled in several steps and the tags are modified between the steps, but the tags are not sent in advance for scheduling of the sending times of the packets from the input ports.
In U.S. Pat. No. 4,630,258 there is described a packet transfer node with a number of input and output ports. One single queue is connected to each input port for storing and transferring packets to all output ports. Conflicts may appear between packets directed to different ports. A multiple port memory is connected between the input and output ports. A control logic is arranged to e.g. transfer packets from the memory to output ports identified in corresponding directing tags on the basis of a predetermined priority scheme. A buffer logic arbitrates tags arriving to the same input ports and competing for the same output port. Furthermore there is carried through a random choice of packets directed to the same output port without need for the packet to wait during an undetermined time.
No tagging is carried through in the input ports. Existing tags follow the transferred packets and are thus not sent in advance.
In U.S. Pat. No. 4,621,359 there is described packet transfer where a packet transfer node handles packets containing directing tags indicative of output port destinations. The aim is to provide a balance of the number of packets addressed for each of the output ports. New tags are therefore generated for redistributing the output port load. The new tags are modified in order to obtain a predetermined output priority scheme.
There is no sending in advance of tags for providing a time controlled sending scheme for subsequent packets.
In U.S. Pat. No. 4,623,996 there is described a packet transfer node which handles packets including directing tags indicative of output port destinations. A plurality of queue switches are individually connected between a plurality of input ports and a plurality of queue sets including a plurality of queues which store and transfer applied packets as a function of the output port destination. The queues of each queue set are connected to different output arbitrators which control the directing to a particular output port.
Tags are not sent in advance for obtaining a time controlled sending scheme for following packets.